1. Field of the Invention
The present invention relates to an information processor including information processing hardware and information processing software used for redundant networks for real-time communication and to a control network system including the information processor and control targets.
2. Description of the Related Art
In some control systems, a single control computer controls one or more control targets via a network. As a control system example, a control network system allows one control computer to be connected with multiple control targets via the ring topology. In this control network system, a control packet is transmitted from the control computer to multiple control targets in order. The control packet may be composed of control instructions for the control targets.
The network topology may be specified as a logical ring topology. In this case, the star topology or the bus topology may be available on the condition that the control packet is transmitted to control targets in order. Control systems based on the ring topology include EtherCAT (registered trademark) and SERCOS (registered trademark), for example.
Generally, the control computer repeatedly performs a specified control process on a control target at a specified cycle. The cycle causes temporal restriction on the control process. The temporal restriction results from the performance or the control scheme required of the control system. The temporal restriction needs to be satisfied for the communication between the control computer and a control target. On the other hand, little or no temporal restriction is imposed on acquisition of statistic information in order to diagnose or monitor control targets.
EtherCAT (Communication Profile Family 12 of IEC61784 Part 2) is available as real-time Ethernet (registered trademark) and configures ring topology using a master provided as the control computer and a slave device (hereafter referred to simply as a slave) attached to a control target. Generally, the slave has two Ethernet ports. The Ethernet ports of slaves are successively connected to configure the ring topology. The master may include one Ethernet port.
When the control network system uses the master having one Ethernet port, the last slave on the ring network internally loops back a packet to finally return the packet to the Ethernet port of the master. For example, the network physically or seemingly configured as line topology can logically function as the ring topology from the viewpoint of the packet communication path.
Such control system may be subject to requirements for the temporal restriction and may require additional processes in order to perform the reliable control processing. Especially, additional processes are needed when a serious disadvantage might result from unsuccessful control processing caused by an error occurrence on the communication path. There is provided a method of making the communication path redundant in order to configure highly reliable ring topology including the single control computer and multiple control targets. Such a technology is known in the prior art in the patent document of Japanese Laid Open Patent JP-2004-96460 or JP-2003-60666.
Connection to the ring topology is made redundant by providing the EtherCAT master with two Ethernet communication ports. When the EtherCAT master is physically provided with two communication ports, an available method of ensuring the redundancy is to transmit the same packet from both of the two communication ports.
Generally, however, the following three problems arise when the conventional method is used to make the EtherCAT master redundant.
Firstly, when the EtherCAT ring network is disconnected, the EtherCAT time synchronization function may not be fully available. The EtherCAT time synchronization function is outlined below. The EtherCAT time synchronization function includes three stages: measuring a communication delay between slaves; compensating an offset between slave clocks; and compensating an advance drift between the slave clocks. The communication delay measurement between slaves is based on an algorithm as shown in FIG. 14.
FIG. 14 shows a packet communication path and reception times at ports of EtherCAT slave ICs 151a, 151b, and 151c. Reference symbols Ta, Tb, Tc, Td, and Te in FIG. 14 denote times for the ports to receive a packet. Reference symbol tdiff denotes a communication delay between the slaves. Reference symbol tp denotes a processing time period of an EtherCAT Processor Unit 160.
Regarding slave A, a clock in the same slave IC 151a measures Ta and Te. The slave IC 151a differs from the slave IC 151b in clock offsets or drifts. It is impossible to simply compare Ta and Te with Tb and Td. Let us suppose that Ta through Te in FIG. 14 are measurable and tp is known. Then, communication delay tdiffBC between slaves C and B is calculated as follows.tdiffBC=(Td−Tb)÷2where (Tc−Tb) and (Td−Tc) are assumed to be equal. It is also assumed that the EtherCAT slaves use the same type of processor unit. When different processor units are used, tp differences need to be taken into consideration.
The following equations find communication delay tdiffAB between slaves B and A.tdiffAB=((Te−Ta)−(Td−Tb)−tp)÷2+tp tdiffBA=tdiffAB−tp 
An EtherCAT slave incompatible with the time synchronization function is assumed to be a mere communication path. In other words, packets need to be transferred at a fixed communication delay.
A time synchronization packet needs to circulate through the ring network in order to enable the time synchronization function. In other words, a communication delay is calculated based on packet reception times on the forward and backward paths for a given slave.
The EtherCAT master may have two communication ports each transmitting time synchronization packets. The packets do not circulate through the ring network and are received at the other communication port than that used for the transmission. Accordingly, it is impossible to calculate a communication delay for the time synchronization.
(Software-Based Redundant Processing)
As another possible redundant method, only one communication port transmits a packet. The packet is looped inside a slave farthest from the packet transmission port, that is, a slave adjacent to the other port of the master. In this case, when the network malfunctions, the same communication port transmits a packet and receives it. Software for the EtherCAT master is used to transmit the packet from the other communication port.
However, the software processing causes a long delay and jitter compared to the packet transfer processing of a slave. This software processing needs to transfer packets at a fixed communication delay as well as an EtherCAT slave incompatible with the time synchronization function.
The synchronization accuracy degrades compared to the time synchronization function for the normal network.
Secondly, commands transmitted from the master may be inconsistent. Especially, the consistency may not be ensured for commands for logical addresses and auto-increment addresses.
(Command Consistency for Logical Addresses)
The following describes a problems of commands concerning logical addresses. The EtherCAT function can map any address spaces for the slaves to a single virtual address space. This virtual address space is referred to as a logical address.
According to the normal redundant configuration for the EtherCAT master, a network error, if any, may cause each of two communication ports to transmit a packet containing a command. Some commands are issued to addresses corresponding to EtherCAT slaves such as station addresses for specifying individual slaves. A packet containing the commands can be issued by determining to which of the two communication ports the slave is connected.
When a command corresponds to the logical address, however, an address to be read or written by the single command may be mapped to the slaves belonging to portions of the network divided by the error. In this case, the EtherCAT master needs to manage a correspondence table of logical addresses and combine results of the command corresponding to the logical address while ensuring the command consistency. This complicates development of the software.
(Command Consistency for Auto-Increment Addresses)
Commands for auto-increment addresses also cause a problem. An EtherCAT auto-increment address is based on EtherCAT slave addressing in accordance with an arrival sequence of packets. When each of the slaves receives a packet having an auto-increment address, the slave determines whether the address equals 0. The slave increments the address value and transfers the packet to the next slave.
FIG. 12 shows how auto-increment addresses specify the slaves. As shown in FIG. 12, the control network system includes multiple slaves 121 connected to a control computer 120 via a network 122. To communicate with the fourth slave (n=4), for example, the master sets the auto-increment address to −3.
An error occurrence on the network 122 changes the packet processing sequence. A packet is processed on an EtherCAT slave different from that intended by a developer. FIG. 13 shows auto-increment addresses for the slaves 121a through 121e when an error occurs on the network 122. According to the configuration in FIG. 13, two communication ports in the control computer 120 simultaneously transmit packets. A path error occurs between the slaves n=3 and n=4 and disconnects the network 122, changing the auto-increment addresses of the fourth and fifth slaves as the original orders.
Thirdly, the software needs to be developed in consideration for two communication ports used for the redundant EtherCAT master. The software development becomes more complicated than that for conventional EtherCAT masters having one port with respect to command combination in the event of an error and the time synchronization, for example.
In short, the conventional information processor based on the redundant configuration of the general-purpose EtherCAT master and the control network system using such information processor entail the problems of a decrease in the time synchronization accuracy, the need for ensuring the EtherCAT command consistency, and the complicated software development due to the 2-port configuration.
The present invention has been made in consideration of the foregoing. It is therefore an object of the invention to provide an information processor and a control network system using the same for configuring a network capable of improving the time synchronization accuracy, ensuring the EtherCAT command consistency, and facilitating the software development for the 2-port configuration.